This invention relates to semiconductor integrated circuit devices, most generally, and the processes for forming such devices. More specifically, this invention relates to the materials, processes, and structures used to form a layered gate dielectric film structure which includes an oxide film, a nitride film, and a transition layer including nitrogen and oxygen which is formed between the oxide and nitride films.
Semiconductor integrated circuit devices typically include a thin dielectric material, commonly a thermally grown oxide, which functions as a gate dielectric for transistors incorporated into the semiconductor integrated circuit devices. The gate dielectric material is typically formed on a semiconductor substrate over a region which will serve as a channel region. The transistors function when a channel is formed in the semiconductor substrate beneath the gate dielectric in response to a voltage being applied to a gate electrode formed atop the gate dielectric film. The quality and integrity of the gate dielectric film is critical to the functionality and lifetime of the transistor devices, which include a very tightly defined set of operational characteristics that are very sensitive to the materials and methods used to form the transistor devices. It is important, therefore, to suppress the migration of any undesired dopant species into the gate dielectric film, or through the gate dielectric film and into the subjacent channel region.
Polycrystalline silicon films are commonly used as gate electrode materials for transistors in semiconductor integrated circuits. Polycrystalline silicon may be xe2x80x9cn-typexe2x80x9d polycrystalline silicon or xe2x80x9cp-typexe2x80x9d polycrystalline silicon. By xe2x80x9cp-typexe2x80x9d polycrystalline silicon material, it is meant that a p-type dopant impurity is included in the polycrystalline silicon film, for example. A commonly used and preferred p-type dopant within the semiconductor industry is boron. When boron is used as an impurity dopant within a polycrystalline silicon film, it is of critical significance to maintain the boron within the polycrystalline silicon film, and especially to suppress migration of the boron into or through the gate dielectric film which forms part of the transistor.
After boron is introduced as a dopant impurity into the polycrystalline silicon, however, subsequent high temperature processing operations used to form semiconductor devices can cause boron to diffuse from the polycrystalline silicon and into the gate dielectric material, or through the gate dielectric material and into the channel region of the transistor formed below the gate dielectric region. Boron diffusion occurs during activation processes which utilize temperatures in the range of 950xc2x0 C. to 1050xc2x0 C. to activate the boron. Boron diffusion can also occur during other high temperature processing operations or during the operation of the completed device. When boron diffuses into the gate dielectric or the channel region, gate dielectric reliability is degraded and device functionality can be destroyed. It is thus of increased significance to suppress the diffusion of boron or other impurities from the polycrystalline silicon interconnect and gate structures and into and through the gate dielectric films. It is therefore desirable to have a built-in means within the gate electrode/gate dielectric structure to suppress boron diffusion from out of the p-type polycrystalline silicon and into or through the gate dielectric material.
One preferred approach to suppressing boron diffusion as above, is to utilize a layered gate dielectric film which includes an oxide film and a superjacent silicon nitride film. An alternate, but similar approach utilizes an oxide film, a nitride film, and a second oxide film. The combination of an oxide film and a superjacent nitride film to form a gate dielectric may successfully suppress boron penetration from p-type polycrystalline silicon into the underlying channel region or to the interface formed between the subjacent oxide film and the semiconductor substrate surface. In addition, the combination of an oxide and a nitride film to form a gate dielectric also reduces current leakage. However, gate structures which include a silicon nitride layer typically introduce charge trapping problems and channel mobility degradation, as well as drive current reduction. The charge trapping problems typically exist at the abrupt interface formed between the oxide and nitride layers. Such trapped charges are difficult to anneal out. Furthermore, the annealing processes used to attempt to correct the charge trapping problem at the abrupt nitride/oxide interface typically cause the diffusion of nitrogen and result in nitrogen migrating to the interface between the oxide film and the subjacent semiconductor substrate surface. The presence of nitrogen at this interface also causes charge trapping problems and channel mobility degradation, as well as drive current reduction.
In today""s rapidly advancing semiconductor device manufacturing industry, the features of components which form semiconductor integrated circuits, continue to shrink. Consistent with this trend, transistors of increasingly small dimensions are being produced. Accordingly, thinner gate dielectric films are necessary. Such thinner films exacerbate the above problems and create others. For example, when a nitride film having a thickness within the range of 10-50 angstroms is produced according to conventional methods, the film may include pinholes, or small voids. In addition to pinholes and the trap sites which can trap charges and degrade the integrity of the film as described above, the nitride film is typically formed to exert a stress upon the substrate. High film stresses can result in dislocations in the substrate, which lead to drive current reduction and junction leakage.
Because of the above problems associated with boron diffusion, and the shortcomings of contemporary attempts to suppress this diffusion by adding a nitride film into a gate material, there is a demonstrated need in the art to provide a process and structure which includes a nitride gate material which is sufficiently thin and suppresses boron penetration, an oxide/substrate surface interface free of nitrogen or other dopant impurities and the associated charge trapping problems, and a nitride/oxide interface free of charge trapping problems.
To address these and other needs, and in view of its purposes, the present invention provides a gate structure for a semiconductor transistor formed on a semiconductor surface. The gate structure includes an oxide layer, a nitride layer and a transition layer interposed between the oxide layer and the nitride layer. The thin transition layer, which forms the interface between the oxide and nitride layers, includes both nitrogen and oxygen as components thereof, and provides for a pristine and defect-free interface between the oxide and nitride. The presence of the nitride layer suppresses the undesired diffusion of boron and other dopant impurities.
The present invention also provides a process for forming a transistor gate structure. The process includes forming a thin gate oxide layer. In a preferred embodiment, the thin gate oxide layer may be a graded structure composed of a composite of separately formed oxide layers. A thin transition layer including nitrogen and oxygen is then formed on the gate oxide layer. In an exemplary embodiment, the transition layer may be formed using a remote nitridation reaction and a formation temperature of no greater than 100xc2x0 C. A silicon nitride layer is then deposited over the transition layer.
The formed gate dielectric structure is substantially free of charge trapping and includes a high-quality interface formed between the oxide and substrate, and a high quality interface formed between the oxide and nitride layers.